Analysis of Variability-Tolerance in Chip-Multiprocessors
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چکیده
Spatially-correlated intra-die process variations cause significant core-to-core frequency variations in chip-multiprocessors. An analytical model of chip-multiprocessor throughput is extended to model designs using frequency islands. The improved variabilitytolerance of such designs over globally-clocked ones is quantified across a range of core counts and sizes under constant die area. The benefits are highest for designs consisting of many small cores, with the throughput of a globally-clocked design with 70 small cores increasing by 8.8% in the move to frequency islands.
منابع مشابه
Fault Tolerance Bandwidth Reduction Techniques for Chip Multiprocessors
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